Christian Manivong
c8bcd5ace1
Unmodified files from DMTF Redfish-Publications (public-rackmount1, public-localstorage, public-telemetry), only those the tests use, each set with DMTF's BSD-3-Clause license and a COMMANDS.txt naming the source commit and request paths. conftest.py loads them by request path and serves a mockup over mocked HTTP, with a SessionService that hands out a token, for the transport tests.
88 lines
2.7 KiB
JSON
88 lines
2.7 KiB
JSON
{
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"@odata.type": "#Processor.v1_24_0.Processor",
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"Id": "FPGA1",
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"Name": "FPGA",
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"ProcessorType": "FPGA",
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"ProcessorArchitecture": "OEM",
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"InstructionSet": "OEM",
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"Manufacturer": "Intel(R) Corporation",
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"Model": "Stratix 10",
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"UUID": "00000000-0000-0000-0000-000000000000",
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"Status": {
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"State": "Enabled",
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"Health": "OK"
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},
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"Metrics": {
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"@odata.id": "/redfish/v1/Systems/437XR1138R2/Processors/FPGA1/ProcessorMetrics"
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},
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"Location": {
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"PartLocation": {
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"ServiceLabel": "U168",
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"LocationType": "Embedded",
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"LocationOrdinalValue": 0
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}
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},
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"TDPWatts": 120,
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"MaxTDPWatts": 150,
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"ProcessorMemory": [
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{
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"IntegratedMemory": true,
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"MemoryType": "HBM2",
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"CapacityMiB": 512,
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"SpeedMHz": 1066
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}
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],
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"FPGA": {
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"FpgaType": "Discrete",
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"Model": "Stratix10",
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"FirmwareId": "0x6400002fc614bb9",
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"FirmwareManufacturer": "Intel(R) Corporation",
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"FirmwareVersion": "Blue v.1.00.86",
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"HostInterface": {
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"InterfaceType": "PCIe",
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"PCIe": {
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"MaxPCIeType": "Gen4",
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"MaxLanes": 8
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}
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},
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"ExternalInterfaces": [
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{
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"InterfaceType": "Ethernet",
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"Ethernet": {
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"MaxSpeedMbps": 10240,
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"MaxLanes": 4
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}
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}
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],
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"PCIeVirtualFunctions": 1,
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"ProgrammableFromHost": true,
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"ReconfigurationSlots": [
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{
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"SlotId": "AFU0",
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"UUID": "00000000-0000-0000-0000-000000000000",
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"ProgrammableFromHost": true,
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"AccelerationFunction": {
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"@odata.id": "/redfish/v1/Systems/437XR1138R2/Processors/FPGA1/AccelerationFunctions/Compression"
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}
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}
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]
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},
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"AccelerationFunctions": {
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"@odata.id": "/redfish/v1/Systems/437XR1138R2/Processors/FPGA1/AccelerationFunctions"
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},
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"Links": {
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"Endpoints": [],
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"ConnectedProcessors": [
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{
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"@odata.id": "/redfish/v1/Systems/437XR1138R2/Processors/CPU1"
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}
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]
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},
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"Actions": {
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"#Processor.Reset": {
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"target": "/redfish/v1/Systems/437XR1138R2/Processors/FPGA1/Actions/Processor.Reset"
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}
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},
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"@odata.id": "/redfish/v1/Systems/437XR1138R2/Processors/FPGA1",
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"@Redfish.Copyright": "Copyright 2014-2026 DMTF. For the full DMTF copyright policy, see http://www.dmtf.org/about/policies/copyright."
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} |