Add DMTF mockup fixtures and test helpers

Unmodified files from DMTF Redfish-Publications (public-rackmount1, public-localstorage, public-telemetry), only those the tests use, each set with DMTF's BSD-3-Clause license and a COMMANDS.txt naming the source commit and request paths. conftest.py loads them by request path and serves a mockup over mocked HTTP, with a SessionService that hands out a token, for the transport tests.
2026-10-12 23:42:14 +00:00
1 parent 17d515d035
commit c8bcd5ace1
@@ -0,0 +1,68 @@
+{
+    "@odata.type": "#Processor.v1_24_0.Processor",
+    "Id": "CPU1",
+    "Name": "Processor",
+    "Socket": "CPU 1",
+    "ProcessorType": "CPU",
+    "ProcessorArchitecture": "x86",
+    "InstructionSet": "x86-64",
+    "Manufacturer": "Intel(R) Corporation",
+    "Model": "Multi-Core Intel(R) Xeon(R) processor 7xxx Series",
+    "ProcessorId": {
+        "VendorId": "GenuineIntel",
+        "IdentificationRegisters": "0x34AC34DC8901274A",
+        "EffectiveFamily": "0x42",
+        "EffectiveModel": "0x61",
+        "Step": "0x1",
+        "MicrocodeInfo": "0x429943"
+    },
+    "Location": {
+        "PartLocation": {
+            "ServiceLabel": "CPU 1",
+            "LocationType": "Socket",
+            "LocationOrdinalValue": 0
+        }
+    },
+    "AdditionalFirmwareVersions": {
+        "Microcode": "0x46"
+    },
+    "MaxSpeedMHz": 3700,
+    "OperatingSpeedMHz": 2333,
+    "OperatingSpeedRangeMHz": {
+        "DataSourceUri": "/redfish/v1/Chassis/1U/Controls/CPU1Freq",
+        "ControlMode": "Automatic",
+        "AllowableMin": 1200,
+        "SettingMin": 2000,
+        "SettingMax": 2400,
+        "AllowableMax": 3700
+    },
+    "TotalCores": 8,
+    "TotalThreads": 16,
+    "Status": {
+        "State": "Enabled",
+        "Health": "OK",
+        "HealthRollup": "Warning",
+        "Conditions": [
+            {
+                "MessageId": "Sensor.1.0.ReadingAboveUpperCautionThreshold",
+                "Timestamp": "2024-08-12T12:25:00-05:00",
+                "Message": "Sensor 'CPU1 Temp' reading of 44 (Cel) is above the 42 upper caution threshold.",
+                "Severity": "Warning",
+                "MessageArgs": [
+                    "CPU1 Temp",
+                    "44",
+                    "Cel",
+                    "42"
+                ],
+                "OriginOfCondition": {
+                    "@odata.id": "/redfish/v1/Chassis/1U/Sensors/CPU1Temp"
+                }
+            }
+        ]
+    },
+    "EnvironmentMetrics": {
+        "@odata.id": "/redfish/v1/Systems/437XR1138R2/Processors/CPU1/EnvironmentMetrics"
+    },
+    "@odata.id": "/redfish/v1/Systems/437XR1138R2/Processors/CPU1",
+    "@Redfish.Copyright": "Copyright 2014-2026 DMTF. For the full DMTF copyright policy, see http://www.dmtf.org/about/policies/copyright."
+}
@@ -0,0 +1,19 @@
+{
+    "@odata.type": "#Processor.v1_24_0.Processor",
+    "Id": "CPU2",
+    "Name": "Processor",
+    "Socket": "CPU 2",
+    "ProcessorType": "CPU",
+    "Status": {
+        "State": "Absent"
+    },
+    "Location": {
+        "PartLocation": {
+            "ServiceLabel": "CPU 2",
+            "LocationType": "Socket",
+            "LocationOrdinalValue": 1
+        }
+    },
+    "@odata.id": "/redfish/v1/Systems/437XR1138R2/Processors/CPU2",
+    "@Redfish.Copyright": "Copyright 2014-2026 DMTF. For the full DMTF copyright policy, see http://www.dmtf.org/about/policies/copyright."
+}
@@ -0,0 +1,88 @@
+{
+    "@odata.type": "#Processor.v1_24_0.Processor",
+    "Id": "FPGA1",
+    "Name": "FPGA",
+    "ProcessorType": "FPGA",
+    "ProcessorArchitecture": "OEM",
+    "InstructionSet": "OEM",
+    "Manufacturer": "Intel(R) Corporation",
+    "Model": "Stratix 10",
+    "UUID": "00000000-0000-0000-0000-000000000000",
+    "Status": {
+        "State": "Enabled",
+        "Health": "OK"
+    },
+    "Metrics": {
+        "@odata.id": "/redfish/v1/Systems/437XR1138R2/Processors/FPGA1/ProcessorMetrics"
+    },
+    "Location": {
+        "PartLocation": {
+            "ServiceLabel": "U168",
+            "LocationType": "Embedded",
+            "LocationOrdinalValue": 0
+        }
+    },
+    "TDPWatts": 120,
+    "MaxTDPWatts": 150,
+    "ProcessorMemory": [
+        {
+            "IntegratedMemory": true,
+            "MemoryType": "HBM2",
+            "CapacityMiB": 512,
+            "SpeedMHz": 1066
+        }
+    ],
+    "FPGA": {
+        "FpgaType": "Discrete",
+        "Model": "Stratix10",
+        "FirmwareId": "0x6400002fc614bb9",
+        "FirmwareManufacturer": "Intel(R) Corporation",
+        "FirmwareVersion": "Blue v.1.00.86",
+        "HostInterface": {
+            "InterfaceType": "PCIe",
+            "PCIe": {
+                "MaxPCIeType": "Gen4",
+                "MaxLanes": 8
+            }
+        },
+        "ExternalInterfaces": [
+            {
+                "InterfaceType": "Ethernet",
+                "Ethernet": {
+                    "MaxSpeedMbps": 10240,
+                    "MaxLanes": 4
+                }
+            }
+        ],
+        "PCIeVirtualFunctions": 1,
+        "ProgrammableFromHost": true,
+        "ReconfigurationSlots": [
+            {
+                "SlotId": "AFU0",
+                "UUID": "00000000-0000-0000-0000-000000000000",
+                "ProgrammableFromHost": true,
+                "AccelerationFunction": {
+                    "@odata.id": "/redfish/v1/Systems/437XR1138R2/Processors/FPGA1/AccelerationFunctions/Compression"
+                }
+            }
+        ]
+    },
+    "AccelerationFunctions": {
+        "@odata.id": "/redfish/v1/Systems/437XR1138R2/Processors/FPGA1/AccelerationFunctions"
+    },
+    "Links": {
+        "Endpoints": [],
+        "ConnectedProcessors": [
+            {
+                "@odata.id": "/redfish/v1/Systems/437XR1138R2/Processors/CPU1"
+            }
+        ]
+    },
+    "Actions": {
+        "#Processor.Reset": {
+            "target": "/redfish/v1/Systems/437XR1138R2/Processors/FPGA1/Actions/Processor.Reset"
+        }
+    },
+    "@odata.id": "/redfish/v1/Systems/437XR1138R2/Processors/FPGA1",
+    "@Redfish.Copyright": "Copyright 2014-2026 DMTF. For the full DMTF copyright policy, see http://www.dmtf.org/about/policies/copyright."
+}
@@ -0,0 +1,18 @@
+{
+    "@odata.type": "#ProcessorCollection.ProcessorCollection",
+    "Name": "Processors Collection",
+    "Members@odata.count": 3,
+    "Members": [
+        {
+            "@odata.id": "/redfish/v1/Systems/437XR1138R2/Processors/CPU1"
+        },
+        {
+            "@odata.id": "/redfish/v1/Systems/437XR1138R2/Processors/CPU2"
+        },
+        {
+            "@odata.id": "/redfish/v1/Systems/437XR1138R2/Processors/FPGA1"
+        }
+    ],
+    "@odata.id": "/redfish/v1/Systems/437XR1138R2/Processors",
+    "@Redfish.Copyright": "Copyright 2014-2026 DMTF. For the full DMTF copyright policy, see http://www.dmtf.org/about/policies/copyright."
+}